# heliaCORE.floatConvRoutes

The rules by which `arm_convolve_f16()`, `arm_convolve_f16_acc16()` and `arm_convolve_f32()` choose a route, in their dispatch order: 1x1, 1xN, conv1d k5, conv1d k3, small-C (MVE float builds), packed-patch GEMM (when ctx holds one patch row), direct. The routers, their buffer-size queries and the direct entries of each route share these, so that a caller selecting the entry per layer ahead of time takes the route the router takes.

## ARM_NN_CONV_NHWC_PATCH_GEMM_F32_MIN_OC

`macro` · `c`

```c
#define ARM_NN_CONV_NHWC_PATCH_GEMM_F32_MIN_OC (8)
```

The packed-patch GEMM route needs at least this many output channels (float32 and float16 alike).

Source: `Include/arm_nnsupportfunctions_flt.h:1562`

## ARM_NN_CONV_NHWC_PATCH_GEMM_F32_MIN_POS

`macro` · `c`

```c
#define ARM_NN_CONV_NHWC_PATCH_GEMM_F32_MIN_POS (8)
```

The packed-patch GEMM route needs at least this many output positions per batch (float32).

Source: `Include/arm_nnsupportfunctions_flt.h:1564`

## ARM_NN_CONV_NHWC_PATCH_GEMM_F16_MIN_OC

`macro` · `c`

```c
#define ARM_NN_CONV_NHWC_PATCH_GEMM_F16_MIN_OC (8)
```

The packed-patch GEMM route needs at least this many output channels (float16).

Source: `Include/arm_nnsupportfunctions_flt.h:1566`

## ARM_NN_CONV_NHWC_PATCH_GEMM_F16_MIN_POS

`macro` · `c`

```c
#define ARM_NN_CONV_NHWC_PATCH_GEMM_F16_MIN_POS (8)
```

The packed-patch GEMM route needs at least this many output positions per batch (float16).

Source: `Include/arm_nnsupportfunctions_flt.h:1568`

## ARM_NN_CONV_SMALL_C_F16_LANES

`macro` · `c`

```c
#define ARM_NN_CONV_SMALL_C_F16_LANES (8)
```

Lanes of the float16 small-C kernel: the route takes fewer input channels than this.

Source: `Include/arm_nnsupportfunctions_flt.h:1575`

## ARM_NN_CONV_SMALL_C_F32_LANES

`macro` · `c`

```c
#define ARM_NN_CONV_SMALL_C_F32_LANES (4)
```

Lanes of the float32 small-C kernel; the general gate takes fewer input channels.

Source: `Include/arm_nnsupportfunctions_flt.h:1577`

## arm_nn_conv_flt_empty

`function` · `c`

```c
static bool arm_nn_conv_flt_empty(const cmsis_nn_dims *output_dims)
```

Identify an empty output request, after dimension validation.

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| output_dims | const cmsis_nn_dims * | in | Output tensor dimensions. |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true for zero batch or spatial extent. |

Source: `Include/arm_nnsupportfunctions_flt.h:1584`

## arm_nn_conv_flt_axis_ok

`function` · `c`

```c
static bool arm_nn_conv_flt_axis_ok(int32_t out, int32_t kernel, int32_t stride, int32_t pad, int32_t dilation)
```

Bound the signed coordinate intermediates for one nonempty output axis.

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| out | int32_t | in | Number of output positions. |
| kernel | int32_t | in | Number of filter taps. |
| stride | int32_t | in | Positive output step. |
| pad | int32_t | in | Nonnegative leading padding. |
| dilation | int32_t | in | Positive filter step. |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true when all coordinate intermediates fit int32. |

Source: `Include/arm_nnsupportfunctions_flt.h:1598`

## arm_nn_conv_flt_dims_ok

`function` · `c`

```c
static bool arm_nn_conv_flt_dims_ok(
    const cmsis_nn_tile *stride,
    const cmsis_nn_tile *padding,
    const cmsis_nn_tile *dilation,
    const cmsis_nn_dims *input_dims,
    const cmsis_nn_dims *filter_dims,
    const cmsis_nn_dims *output_dims,
    size_t element_size,
    int32_t packed_lanes,
    bool packed
)
```

Validate common float convolution metadata and accessed arithmetic. Output windows are explicit; generic kernels clip their out-of-input taps.

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| stride | const cmsis_nn_tile * | in | Spatial output steps. |
| padding | const cmsis_nn_tile * | in | Leading spatial padding. |
| dilation | const cmsis_nn_tile * | in | Spatial filter steps. |
| input_dims | const cmsis_nn_dims * | in | Input dimensions [N, H, W, C_IN]. |
| filter_dims | const cmsis_nn_dims * | in | Filter dimensions [C_OUT, KH, KW, C_IN]. |
| output_dims | const cmsis_nn_dims * | in | Output dimensions [N, H, W, C_OUT]. |
| element_size | size_t | in | Bytes per tensor element. |
| packed_lanes | int32_t | in | Channel block size and vector loop width for the dtype. |
| packed | bool | in | Whether the filter uses NT_N_PACKED storage. |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true for consistent metadata and representable nonempty work, or a valid empty request. |

Source: `Include/arm_nnsupportfunctions_flt.h:1619`

## arm_nn_conv_flt_1x1_window_ok

`function` · `c`

```c
static bool arm_nn_conv_flt_1x1_window_ok(
    const cmsis_nn_tile *stride,
    const cmsis_nn_dims *input_dims,
    const cmsis_nn_dims *output_dims
)
```

Check window coverage for an unpadded 1x1 body that samples directly.

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| stride | const cmsis_nn_tile * | in | Spatial output steps. |
| input_dims | const cmsis_nn_dims * | in | Input dimensions. |
| output_dims | const cmsis_nn_dims * | in | Output dimensions. |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true when every requested sample lies inside the input. |

Source: `Include/arm_nnsupportfunctions_flt.h:1676`

## arm_nn_conv_f32_small_c_coords_ok

`function` · `c`

```c
static bool arm_nn_conv_f32_small_c_coords_ok(
    const cmsis_nn_tile *stride,
    const cmsis_nn_tile *padding,
    const cmsis_nn_tile *dilation,
    const cmsis_nn_dims *input_dims,
    const cmsis_nn_dims *filter_dims,
    const cmsis_nn_dims *output_dims
)
```

Bound f32 small-C coordinates, including inactive lanes and contiguous-load spans.

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| stride | const cmsis_nn_tile * | in | Spatial output steps. |
| padding | const cmsis_nn_tile * | in | Leading spatial padding. |
| dilation | const cmsis_nn_tile * | in | Spatial filter steps. |
| input_dims | const cmsis_nn_dims * | in | Validated input dimensions. |
| filter_dims | const cmsis_nn_dims * | in | Validated filter dimensions. |
| output_dims | const cmsis_nn_dims * | in | Validated nonempty output dimensions. |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true when signed lane coordinates and products remain representable. |

Source: `Include/arm_nnsupportfunctions_flt.h:1695`

## arm_nn_conv_flt_is_1x1

`function` · `c`

```c
static bool arm_nn_conv_flt_is_1x1(const cmsis_nn_tile *padding, const cmsis_nn_dims *filter_dims)
```

The 1x1 route: a 1x1 filter with no padding.

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| padding | const cmsis_nn_tile * | in | Spatial zero-padding |
| filter_dims | const cmsis_nn_dims * | in | Filter dimensions [C_OUT, KH, KW, C_IN] |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true if the router takes the 1x1 route |

Source: `Include/arm_nnsupportfunctions_flt.h:1716`

## arm_nn_conv_flt_is_1d_k

`function` · `c`

```c
static bool arm_nn_conv_flt_is_1d_k(
    const cmsis_nn_tile *stride,
    const cmsis_nn_tile *padding,
    const cmsis_nn_tile *dilation,
    const cmsis_nn_dims *input_dims,
    const cmsis_nn_dims *filter_dims,
    const cmsis_nn_dims *output_dims,
    const int32_t k
)
```

A conv1d with a 1 x k filter: batch 1, input and output height 1, unit stride and dilation, no padding.

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| stride | const cmsis_nn_tile * | in | Spatial stride |
| padding | const cmsis_nn_tile * | in | Spatial zero-padding |
| dilation | const cmsis_nn_tile * | in | Spatial dilation |
| input_dims | const cmsis_nn_dims * | in | Input dimensions [N, H, W, C_IN] |
| filter_dims | const cmsis_nn_dims * | in | Filter dimensions [C_OUT, KH, KW, C_IN] |
| output_dims | const cmsis_nn_dims * | in | Output dimensions [N, H, W, C_OUT] |
| k | const int32_t | in | Filter width |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true for the conv1d k5 route with k = 5 and the conv1d k3 route with k = 3 |

Source: `Include/arm_nnsupportfunctions_flt.h:1732`

## arm_nn_conv_flt_is_1xn

`function` · `c`

```c
static bool arm_nn_conv_flt_is_1xn(
    const cmsis_nn_tile *stride,
    const cmsis_nn_tile *padding,
    const cmsis_nn_tile *dilation,
    const cmsis_nn_dims *input_dims,
    const cmsis_nn_dims *filter_dims,
    const cmsis_nn_dims *output_dims
)
```

The shape part of the 1xN route: input, output and filter height 1, a filter wider than 1, unit stride and dilation in height, unit dilation in width, a positive width stride and no height padding. Unless NN_DISABLE_SPECIALIZATION is defined, the routers take the conv1d routes for their shapes first. The router also needs ctx to hold `arm_convolve_1_x_n_f16_get_buffer_size()` (or _f32).

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| stride | const cmsis_nn_tile * | in | Spatial stride |
| padding | const cmsis_nn_tile * | in | Spatial zero-padding |
| dilation | const cmsis_nn_tile * | in | Spatial dilation |
| input_dims | const cmsis_nn_dims * | in | Input dimensions [N, H, W, C_IN] |
| filter_dims | const cmsis_nn_dims * | in | Filter dimensions [C_OUT, KH, KW, C_IN] |
| output_dims | const cmsis_nn_dims * | in | Output dimensions [N, H, W, C_OUT] |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true if the shape takes the 1xN route when ctx is large enough and no conv1d route claims it |

Source: `Include/arm_nnsupportfunctions_flt.h:1758`

## arm_nn_conv_f16_is_small_c

`function` · `c`

```c
static bool arm_nn_conv_f16_is_small_c(
    const cmsis_nn_tile *stride,
    const cmsis_nn_tile *padding,
    const cmsis_nn_tile *dilation,
    const cmsis_nn_dims *input_dims,
    const cmsis_nn_dims *filter_dims,
    const cmsis_nn_dims *output_dims
)
```

The float16 small-C route: fewer input channels than ARM_NN_CONV_SMALL_C_F16_LANES, a positive output depth and width, a positive input width, filter width, stride and dilation, a non-negative padding, and every gather and scatter offset within 16 bits.

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| stride | const cmsis_nn_tile * | in | Spatial stride |
| padding | const cmsis_nn_tile * | in | Spatial zero-padding |
| dilation | const cmsis_nn_tile * | in | Spatial dilation |
| input_dims | const cmsis_nn_dims * | in | Input dimensions [N, H, W, C_IN] |
| filter_dims | const cmsis_nn_dims * | in | Filter dimensions [C_OUT, KH, KW, C_IN] |
| output_dims | const cmsis_nn_dims * | in | Output dimensions [N, H, W, C_OUT] |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true if the float16 routers take the small-C route on MVE float builds |

Source: `Include/arm_nnsupportfunctions_flt.h:1783`

## arm_nn_conv_f32_is_small_c

`function` · `c`

```c
static bool arm_nn_conv_f32_is_small_c(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *output_dims)
```

The float32 small-C route: fewer input channels than ARM_NN_CONV_SMALL_C_F32_LANES and a positive output depth and width.

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| input_dims | const cmsis_nn_dims * | in | Input dimensions [N, H, W, C_IN] |
| output_dims | const cmsis_nn_dims * | in | Output dimensions [N, H, W, C_OUT] |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true if `arm_convolve_f32()` takes the small-C route on MVE float builds |

Source: `Include/arm_nnsupportfunctions_flt.h:1814`

## arm_nn_conv_f32_is_small_c_3x3

`function` · `c`

```c
static bool arm_nn_conv_f32_is_small_c_3x3(
    const cmsis_nn_dims *input_dims,
    const cmsis_nn_dims *filter_dims,
    const cmsis_nn_dims *output_dims
)
```

Additional float32 small-C region: 3x3 filters, four input channels and up to 8 output channels.

:::note
Requires at least one full four-column output tile.

:::

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| input_dims | const cmsis_nn_dims * | in | Input dimensions [N, H, W, C_IN] |
| filter_dims | const cmsis_nn_dims * | in | Filter dimensions [C_OUT, HK, WK, C_IN] |
| output_dims | const cmsis_nn_dims * | in | Output dimensions [N, H, W, C_OUT] |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true if the shape uses the small-C route, subject to its coordinate bounds |

Source: `Include/arm_nnsupportfunctions_flt.h:1828`

## arm_nn_conv_flt_is_patch_gemm

`function` · `c`

```c
static bool arm_nn_conv_flt_is_patch_gemm(const cmsis_nn_dims *output_dims)
```

The shape part of the packed-patch GEMM route: at least ARM_NN_CONV_NHWC_PATCH_GEMM_F16_MIN_OC output channels and ARM_NN_CONV_NHWC_PATCH_GEMM_F16_MIN_POS output positions per batch (the float32 thresholds are equal). The router also needs ctx to hold one patch row (KH x KW x C_IN elements).

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| output_dims | const cmsis_nn_dims * | in | Output dimensions [N, H, W, C_OUT] |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true if the shape takes the packed-patch GEMM route when ctx is large enough |

Source: `Include/arm_nnsupportfunctions_flt.h:1843`

## arm_nn_dw_f16_is_1d_k3

`function` · `c`

```c
static bool arm_nn_dw_f16_is_1d_k3(
    const cmsis_nn_dw_conv_params_f16 *dw_conv_params,
    const cmsis_nn_dims *input_dims,
    const cmsis_nn_dims *filter_dims,
    const cmsis_nn_dims *output_dims
)
```

The depthwise conv1d k3 route of `arm_depthwise_conv_f16()`: batch 1, channel multiplier 1, a 1x3 filter, input and output height 1, unit stride and dilation, no padding.

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| dw_conv_params | const cmsis_nn_dw_conv_params_f16 * | in | Depthwise parameters |
| input_dims | const cmsis_nn_dims * | in | Input dimensions [N, H, W, C_IN] |
| filter_dims | const cmsis_nn_dims * | in | Filter dimensions [1, HK, WK, C_OUT] |
| output_dims | const cmsis_nn_dims * | in | Output dimensions [N, H, W, C_OUT] |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true if the router takes the conv1d k3 route (unless NN_DISABLE_SPECIALIZATION is defined) |

Source: `Include/arm_nnsupportfunctions_flt.h:1859`

## arm_nn_dw_f16_is_2x5

`function` · `c`

```c
static bool arm_nn_dw_f16_is_2x5(
    const cmsis_nn_dw_conv_params_f16 *dw_conv_params,
    const cmsis_nn_dims *input_dims,
    const cmsis_nn_dims *filter_dims,
    const cmsis_nn_dims *output_dims
)
```

The depthwise 2x5 route of `arm_depthwise_conv_f16()`: a 2x5 filter, input height 2, output height 1, unit stride and dilation, no padding; any batch and channel multiplier.

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| dw_conv_params | const cmsis_nn_dw_conv_params_f16 * | in | Depthwise parameters |
| input_dims | const cmsis_nn_dims * | in | Input dimensions [N, H, W, C_IN] |
| filter_dims | const cmsis_nn_dims * | in | Filter dimensions [1, HK, WK, C_OUT] |
| output_dims | const cmsis_nn_dims * | in | Output dimensions [N, H, W, C_OUT] |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true if the router takes the 2x5 route (unless NN_DISABLE_SPECIALIZATION is defined) |

Source: `Include/arm_nnsupportfunctions_flt.h:1879`

## arm_nn_dw_f16_is_cin1

`function` · `c`

```c
static bool arm_nn_dw_f16_is_cin1(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *output_dims)
```

The shape part of the depthwise one-input-channel route of `arm_depthwise_conv_f16()` on MVE float builds: one input channel and at least CONVERT_DW_CONV_WITH_ONE_INPUT_CH_AND_OUTPUT_CH_ABOVE_THRESHOLD output channels (the threshold depends on the compiler). The router takes the route after the channel-multiplier-1 route, and only when ctx->size is at least arm_nn_dw_f16_cin1_min_ctx_size; otherwise it takes the generic route.

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| input_dims | const cmsis_nn_dims * | in | Input dimensions [N, H, W, C_IN] |
| output_dims | const cmsis_nn_dims * | in | Output dimensions [N, H, W, C_OUT] |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | true if the shape takes the one-input-channel route when ctx is large enough |

Source: `Include/arm_nnsupportfunctions_flt.h:1899`

## arm_nn_dw_f16_cin1_min_ctx_size

`function` · `c`

```c
static int64_t arm_nn_dw_f16_cin1_min_ctx_size(const cmsis_nn_dims *filter_dims, const cmsis_nn_dims *output_dims)
```

The least ctx->size, in bytes, of the depthwise one-input-channel route: the filter packed in blocks of 8 output channels, then one patch row of KH x KW elements. More scratch packs more patch rows per step.

**Parameters**

| Name | Type | Direction | Description |
| --- | --- | --- | --- |
| filter_dims | const cmsis_nn_dims * | in | Filter dimensions [1, HK, WK, C_OUT] |
| output_dims | const cmsis_nn_dims * | in | Output dimensions [N, H, W, C_OUT] |

**Returns**

| Name | Type | Description |
| --- | --- | --- |
|  |  | the size in bytes (64 bits, so that the caller can bound it), or INT64_MAX for a negative dimension or more than INT32_MAX taps, which no ctx can hold |

Source: `Include/arm_nnsupportfunctions_flt.h:1912`