Boards & Platforms#

heliaPROFILER uses a two-level hardware model: Board → SoC. The board identifies the physical EVB and dictates J-Link device strings, USB IDs, and pin defaults. The SoC determines CPU architecture, PMU capabilities, and memory layout.

Supported boards#

Run hpx boards to see the live list. As of this release:

SoC families#

AP5 — Cortex-M55 (Apollo510, Apollo510b, Apollo5b, Apollo330P)#

• Full Armv8-M PMU with 8 configurable event counters plus a dedicated cycle counter.
• 70+ PMU events across CPU, memory, and MVE groups.
• MVE / Helium SIMD support — vectorized CMSIS-NN kernels.
• Per-layer counter breakdown is fully supported.

AP4 — Cortex-M4 (Apollo4p)#

• DWT cycle counter only — no configurable PMU events.
• No MVE/Helium support.
• PMU group selections (cpu, memory, mve) are ignored — only the cycle count is captured.

AP3 — Cortex-M4 (Apollo3p)#

• Same DWT-only profile as AP4.
• Smallest memory budget of the supported boards.

What this means for your config#

When you target an AP4/AP3 board, the profiler warns about ignored PMU/MVE selections and falls back to cycle-count-only capture. The config itself is not rejected — it's reduced.

SDK / NSX module mapping#

Each SoC family maps to an AmbiqSuite SDK tier, which determines which NSX modules are pulled into the firmware build. This is fully automatic; you only choose target.board.

J-Link device strings#

The profiler passes the right device string to JLinkExe automatically. For reference:

If you have multiple probes connected, pin one with --jlink-serial <SN> or target.jlink_serial: "<SN>".

Adding a new board#

HPX now supports config-scoped custom boards. For a board that behaves like an existing EVB, add a target.custom_boards entry in your config and inherit from the closest built-in board:

target:
  board: apollo510_lab
  custom_boards:
    apollo510_lab:
      based_on: apollo510_evb
      channel: dev
      default_sync_gpio_pin: 27

If you are bringing up a genuinely new SoC/board combination, define a custom SoC first, then point a custom board at it:

target:
  board: apollo510_custom_board
  custom_socs:
    apollo510_custom:
      based_on: apollo510
      jlink_device: AP510-CUSTOM
      rtt_scan_ranges:
        - [0x21000000, 0x100000]
  custom_boards:
    apollo510_custom_board:
      soc: apollo510_custom
      channel: dev
      starter_profile_board: apollo510_evb

The important fields are still the same platform facts as the built-in registry:

• Board name and SoC family
• J-Link device string
• Memory layout (MRAM/SRAM/TCM/PSRAM sizes)
• Default sync GPIO pin (most built-in EVBs register a board-specific pin, e.g. 29 for apollo510_evb / apollo510b_evb, 22 for the Apollo4 Plus EVBs, 61 for the Apollo4 Lite EVBs, and 26 for the Apollo3 Plus EVBs; 10 is only the fallback for boards without a registered override)

starter_profile_board lets a custom board reuse the NSX starter-profile module graph from a built-in board while keeping its own board ID, channel, sync pin, and SoC metadata in HPX.

See Architecture → Adding an Engine for the analogous engine path.