Struct ns_nvm_config_t

NVM configuration.

Public Attributes

Type	Name
ns_core_api_t const *	api API prefix (use &ns_nvm_current_version)
uint8_t	chip_select 0 -> CE0, 1 -> CE1
am_hal_mspi_clock_e	clock_freq e.g. AM_HAL_MSPI_CLK_96MHZ, _125MHZ, etc.
bool	enable Set true to enable/init the device.
bool	enable_xip Enable XIP at the end of init (optional)
ns_nvm_interface_e	iface Octal DDR vs. 1-8-8.
uint8_t	mspi_module 0..3 (depends on part/package)
uint32_t *	nbtxn_buf Pointer to DMA/TCB buffer (uint32_t)
uint32_t	nbtxn_buf_len Length in uint32_t elements.
uint32_t	scrambling_end
uint32_t	scrambling_start
uint32_t	size_bytes Device capacity in bytes (8MB for IS25WX064)
uint32_t	xip_base_address XIP aperture base for selected module.

API prefix (use &ns_nvm_current_version)

ns_core_api_t const* ns_nvm_config_t::api;

0 -> CE0, 1 -> CE1

uint8_t ns_nvm_config_t::chip_select;

e.g. AM_HAL_MSPI_CLK_96MHZ, _125MHZ, etc.

am_hal_mspi_clock_e ns_nvm_config_t::clock_freq;

Set true to enable/init the device.

bool ns_nvm_config_t::enable;

Enable XIP at the end of init (optional)

bool ns_nvm_config_t::enable_xip;

Octal DDR vs. 1-8-8.

ns_nvm_interface_e ns_nvm_config_t::iface;

0..3 (depends on part/package)

uint8_t ns_nvm_config_t::mspi_module;

Pointer to DMA/TCB buffer (uint32_t)

uint32_t* ns_nvm_config_t::nbtxn_buf;

Length in uint32_t elements.

uint32_t ns_nvm_config_t::nbtxn_buf_len;

uint32_t ns_nvm_config_t::scrambling_end;

uint32_t ns_nvm_config_t::scrambling_start;

Device capacity in bytes (8MB for IS25WX064)

uint32_t ns_nvm_config_t::size_bytes;

XIP aperture base for selected module.

uint32_t ns_nvm_config_t::xip_base_address;

The documentation for this class was generated from the following file neuralspot/neuralspot/ns-peripherals/includes-api/ns_nvm.h