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Float convolution route predicates

The rules by which arm_convolve_f16(), arm_convolve_f16_acc16() and arm_convolve_f32() choose a route, in their dispatch order: 1x1, 1xN, conv1d k5, conv1d k3, small-C (MVE float builds), packed-patch GEMM (when ctx holds one patch row), direct. The routers, their buffer-size queries and the direct entries of each route share these, so that a caller selecting the entry per layer ahead of time takes the route the router takes.

Machine-readable model

  • ARM_NN_CONV_NHWC_PATCH_GEMM_F32_MIN_OCmacroThe packed-patch GEMM route needs at least this many output channels (float32 and float16 alike).
  • ARM_NN_CONV_NHWC_PATCH_GEMM_F32_MIN_POSmacroThe packed-patch GEMM route needs at least this many output positions per batch (float32).
  • ARM_NN_CONV_NHWC_PATCH_GEMM_F16_MIN_OCmacroThe packed-patch GEMM route needs at least this many output channels (float16).
  • ARM_NN_CONV_NHWC_PATCH_GEMM_F16_MIN_POSmacroThe packed-patch GEMM route needs at least this many output positions per batch (float16).
  • ARM_NN_CONV_SMALL_C_F16_LANESmacroLanes of the float16 small-C kernel: the route takes fewer input channels than this.
  • ARM_NN_CONV_SMALL_C_F32_LANESmacroLanes of the float32 small-C kernel; the general gate takes fewer input channels.
  • arm_nn_conv_flt_emptyfunctionIdentify an empty output request, after dimension validation.
  • arm_nn_conv_flt_axis_okfunctionBound the signed coordinate intermediates for one nonempty output axis.
  • arm_nn_conv_flt_dims_okfunctionValidate common float convolution metadata and accessed arithmetic.
  • arm_nn_conv_flt_1x1_window_okfunctionCheck window coverage for an unpadded 1x1 body that samples directly.
  • arm_nn_conv_f32_small_c_coords_okfunctionBound f32 small-C coordinates, including inactive lanes and contiguous-load spans.
  • arm_nn_conv_flt_is_1x1functionThe 1x1 route: a 1x1 filter with no padding.
  • arm_nn_conv_flt_is_1d_kfunctionA conv1d with a 1 x k filter: batch 1, input and output height 1, unit stride and dilation, no padding.
  • arm_nn_conv_flt_is_1xnfunctionThe shape part of the 1xN route: input, output and filter height 1, a filter wider than 1, unit stride and dilation in height, unit dilation in width, a positi…
  • arm_nn_conv_f16_is_small_cfunctionThe float16 small-C route: fewer input channels than ARMNNCONVSMALLCF16LANES, a positive output depth and width, a positive input width, filter width, stride a…
  • arm_nn_conv_f32_is_small_cfunctionThe float32 small-C route: fewer input channels than ARMNNCONVSMALLCF32LANES and a positive output depth and width.
  • arm_nn_conv_f32_is_small_c_3x3functionAdditional float32 small-C region: 3x3 filters, four input channels and up to 8 output channels.
  • arm_nn_conv_flt_is_patch_gemmfunctionThe shape part of the packed-patch GEMM route: at least ARMNNCONVNHWCPATCHGEMMF16MINOC output channels and ARMNNCONVNHWCPATCHGEMMF16MINPOS output positions per…
  • arm_nn_dw_f16_is_1d_k3functionThe depthwise conv1d k3 route of armdepthwiseconvf16(): batch 1, channel multiplier 1, a 1x3 filter, input and output height 1, unit stride and dilation, no pa…
  • arm_nn_dw_f16_is_2x5functionThe depthwise 2x5 route of armdepthwiseconvf16(): a 2x5 filter, input height 2, output height 1, unit stride and dilation, no padding; any batch and channel mu…
  • arm_nn_dw_f16_is_cin1functionThe shape part of the depthwise one-input-channel route of armdepthwiseconvf16() on MVE float builds: one input channel and at least CONVERTDWCONVWITHONEINPUTC…
  • arm_nn_dw_f16_cin1_min_ctx_sizefunctionThe least ctx->size, in bytes, of the depthwise one-input-channel route: the filter packed in blocks of 8 output channels, then one patch row of KH x KW elemen…
function

Identify an empty output request, after dimension validation.

Include/arm_nnsupportfunctions_flt.h:1584

static bool arm_nn_conv_flt_empty(const cmsis_nn_dims *output_dims)

Identify an empty output request, after dimension validation.

Parameters of arm_nn_conv_flt_empty
NameTypeDirectionDescription
output_dimsconst cmsis_nn_dims *inOutput tensor dimensions.
Returns of arm_nn_conv_flt_empty
Description
true for zero batch or spatial extent.
function

Bound the signed coordinate intermediates for one nonempty output axis.

Include/arm_nnsupportfunctions_flt.h:1598

static bool arm_nn_conv_flt_axis_ok(int32_t out, int32_t kernel, int32_t stride, int32_t pad, int32_t dilation)

Bound the signed coordinate intermediates for one nonempty output axis.

Parameters of arm_nn_conv_flt_axis_ok
NameTypeDirectionDescription
outint32_tinNumber of output positions.
kernelint32_tinNumber of filter taps.
strideint32_tinPositive output step.
padint32_tinNonnegative leading padding.
dilationint32_tinPositive filter step.
Returns of arm_nn_conv_flt_axis_ok
Description
true when all coordinate intermediates fit int32.
function

Validate common float convolution metadata and accessed arithmetic.

Include/arm_nnsupportfunctions_flt.h:1619

static bool arm_nn_conv_flt_dims_ok(
const cmsis_nn_tile *stride,
const cmsis_nn_tile *padding,
const cmsis_nn_tile *dilation,
const cmsis_nn_dims *input_dims,
const cmsis_nn_dims *filter_dims,
const cmsis_nn_dims *output_dims,
size_t element_size,
int32_t packed_lanes,
bool packed
)

Validate common float convolution metadata and accessed arithmetic. Output windows are explicit; generic kernels clip their out-of-input taps.

Parameters of arm_nn_conv_flt_dims_ok
NameTypeDirectionDescription
strideconst cmsis_nn_tile *inSpatial output steps.
paddingconst cmsis_nn_tile *inLeading spatial padding.
dilationconst cmsis_nn_tile *inSpatial filter steps.
input_dimsconst cmsis_nn_dims *inInput dimensions [N, H, W, C_IN].
filter_dimsconst cmsis_nn_dims *inFilter dimensions [C_OUT, KH, KW, C_IN].
output_dimsconst cmsis_nn_dims *inOutput dimensions [N, H, W, C_OUT].
element_sizesize_tinBytes per tensor element.
packed_lanesint32_tinChannel block size and vector loop width for the dtype.
packedboolinWhether the filter uses NT_N_PACKED storage.
Returns of arm_nn_conv_flt_dims_ok
Description
true for consistent metadata and representable nonempty work, or a valid empty request.
function

Check window coverage for an unpadded 1x1 body that samples directly.

Include/arm_nnsupportfunctions_flt.h:1676

static bool arm_nn_conv_flt_1x1_window_ok(
const cmsis_nn_tile *stride,
const cmsis_nn_dims *input_dims,
const cmsis_nn_dims *output_dims
)

Check window coverage for an unpadded 1x1 body that samples directly.

Parameters of arm_nn_conv_flt_1x1_window_ok
NameTypeDirectionDescription
strideconst cmsis_nn_tile *inSpatial output steps.
input_dimsconst cmsis_nn_dims *inInput dimensions.
output_dimsconst cmsis_nn_dims *inOutput dimensions.
Returns of arm_nn_conv_flt_1x1_window_ok
Description
true when every requested sample lies inside the input.
function

Bound f32 small-C coordinates, including inactive lanes and contiguous-load spans.

Include/arm_nnsupportfunctions_flt.h:1695

static bool arm_nn_conv_f32_small_c_coords_ok(
const cmsis_nn_tile *stride,
const cmsis_nn_tile *padding,
const cmsis_nn_tile *dilation,
const cmsis_nn_dims *input_dims,
const cmsis_nn_dims *filter_dims,
const cmsis_nn_dims *output_dims
)

Bound f32 small-C coordinates, including inactive lanes and contiguous-load spans.

Parameters of arm_nn_conv_f32_small_c_coords_ok
NameTypeDirectionDescription
strideconst cmsis_nn_tile *inSpatial output steps.
paddingconst cmsis_nn_tile *inLeading spatial padding.
dilationconst cmsis_nn_tile *inSpatial filter steps.
input_dimsconst cmsis_nn_dims *inValidated input dimensions.
filter_dimsconst cmsis_nn_dims *inValidated filter dimensions.
output_dimsconst cmsis_nn_dims *inValidated nonempty output dimensions.
Returns of arm_nn_conv_f32_small_c_coords_ok
Description
true when signed lane coordinates and products remain representable.
function

The 1x1 route: a 1x1 filter with no padding.

Include/arm_nnsupportfunctions_flt.h:1716

static bool arm_nn_conv_flt_is_1x1(const cmsis_nn_tile *padding, const cmsis_nn_dims *filter_dims)

The 1x1 route: a 1x1 filter with no padding.

Parameters of arm_nn_conv_flt_is_1x1
NameTypeDirectionDescription
paddingconst cmsis_nn_tile *inSpatial zero-padding
filter_dimsconst cmsis_nn_dims *inFilter dimensions [C_OUT, KH, KW, C_IN]
Returns of arm_nn_conv_flt_is_1x1
Description
true if the router takes the 1x1 route
function

A conv1d with a 1 x k filter: batch 1, input and output height 1, unit stride and dilation, no padding.

Include/arm_nnsupportfunctions_flt.h:1732

static bool arm_nn_conv_flt_is_1d_k(
const cmsis_nn_tile *stride,
const cmsis_nn_tile *padding,
const cmsis_nn_tile *dilation,
const cmsis_nn_dims *input_dims,
const cmsis_nn_dims *filter_dims,
const cmsis_nn_dims *output_dims,
const int32_t k
)

A conv1d with a 1 x k filter: batch 1, input and output height 1, unit stride and dilation, no padding.

Parameters of arm_nn_conv_flt_is_1d_k
NameTypeDirectionDescription
strideconst cmsis_nn_tile *inSpatial stride
paddingconst cmsis_nn_tile *inSpatial zero-padding
dilationconst cmsis_nn_tile *inSpatial dilation
input_dimsconst cmsis_nn_dims *inInput dimensions [N, H, W, C_IN]
filter_dimsconst cmsis_nn_dims *inFilter dimensions [C_OUT, KH, KW, C_IN]
output_dimsconst cmsis_nn_dims *inOutput dimensions [N, H, W, C_OUT]
kconst int32_tinFilter width
Returns of arm_nn_conv_flt_is_1d_k
Description
true for the conv1d k5 route with k = 5 and the conv1d k3 route with k = 3
function

The shape part of the 1xN route: input, output and filter height 1, a filter wider than 1, unit stride and dilation in height, unit dilation in width, a positi…

Include/arm_nnsupportfunctions_flt.h:1758

static bool arm_nn_conv_flt_is_1xn(
const cmsis_nn_tile *stride,
const cmsis_nn_tile *padding,
const cmsis_nn_tile *dilation,
const cmsis_nn_dims *input_dims,
const cmsis_nn_dims *filter_dims,
const cmsis_nn_dims *output_dims
)

The shape part of the 1xN route: input, output and filter height 1, a filter wider than 1, unit stride and dilation in height, unit dilation in width, a positive width stride and no height padding. Unless NN_DISABLE_SPECIALIZATION is defined, the routers take the conv1d routes for their shapes first. The router also needs ctx to hold arm_convolve_1_x_n_f16_get_buffer_size() (or _f32).

Parameters of arm_nn_conv_flt_is_1xn
NameTypeDirectionDescription
strideconst cmsis_nn_tile *inSpatial stride
paddingconst cmsis_nn_tile *inSpatial zero-padding
dilationconst cmsis_nn_tile *inSpatial dilation
input_dimsconst cmsis_nn_dims *inInput dimensions [N, H, W, C_IN]
filter_dimsconst cmsis_nn_dims *inFilter dimensions [C_OUT, KH, KW, C_IN]
output_dimsconst cmsis_nn_dims *inOutput dimensions [N, H, W, C_OUT]
Returns of arm_nn_conv_flt_is_1xn
Description
true if the shape takes the 1xN route when ctx is large enough and no conv1d route claims it
function

The float16 small-C route: fewer input channels than ARMNNCONVSMALLCF16LANES, a positive output depth and width, a positive input width, filter width, stride a…

Include/arm_nnsupportfunctions_flt.h:1783

static bool arm_nn_conv_f16_is_small_c(
const cmsis_nn_tile *stride,
const cmsis_nn_tile *padding,
const cmsis_nn_tile *dilation,
const cmsis_nn_dims *input_dims,
const cmsis_nn_dims *filter_dims,
const cmsis_nn_dims *output_dims
)

The float16 small-C route: fewer input channels than ARM_NN_CONV_SMALL_C_F16_LANES, a positive output depth and width, a positive input width, filter width, stride and dilation, a non-negative padding, and every gather and scatter offset within 16 bits.

Parameters of arm_nn_conv_f16_is_small_c
NameTypeDirectionDescription
strideconst cmsis_nn_tile *inSpatial stride
paddingconst cmsis_nn_tile *inSpatial zero-padding
dilationconst cmsis_nn_tile *inSpatial dilation
input_dimsconst cmsis_nn_dims *inInput dimensions [N, H, W, C_IN]
filter_dimsconst cmsis_nn_dims *inFilter dimensions [C_OUT, KH, KW, C_IN]
output_dimsconst cmsis_nn_dims *inOutput dimensions [N, H, W, C_OUT]
Returns of arm_nn_conv_f16_is_small_c
Description
true if the float16 routers take the small-C route on MVE float builds
function

The float32 small-C route: fewer input channels than ARMNNCONVSMALLCF32LANES and a positive output depth and width.

Include/arm_nnsupportfunctions_flt.h:1814

static bool arm_nn_conv_f32_is_small_c(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *output_dims)

The float32 small-C route: fewer input channels than ARM_NN_CONV_SMALL_C_F32_LANES and a positive output depth and width.

Parameters of arm_nn_conv_f32_is_small_c
NameTypeDirectionDescription
input_dimsconst cmsis_nn_dims *inInput dimensions [N, H, W, C_IN]
output_dimsconst cmsis_nn_dims *inOutput dimensions [N, H, W, C_OUT]
Returns of arm_nn_conv_f32_is_small_c
Description
true if `arm_convolve_f32()` takes the small-C route on MVE float builds
function

Additional float32 small-C region: 3x3 filters, four input channels and up to 8 output channels.

Include/arm_nnsupportfunctions_flt.h:1828

static bool arm_nn_conv_f32_is_small_c_3x3(
const cmsis_nn_dims *input_dims,
const cmsis_nn_dims *filter_dims,
const cmsis_nn_dims *output_dims
)

Additional float32 small-C region: 3x3 filters, four input channels and up to 8 output channels.

Parameters of arm_nn_conv_f32_is_small_c_3x3
NameTypeDirectionDescription
input_dimsconst cmsis_nn_dims *inInput dimensions [N, H, W, C_IN]
filter_dimsconst cmsis_nn_dims *inFilter dimensions [C_OUT, HK, WK, C_IN]
output_dimsconst cmsis_nn_dims *inOutput dimensions [N, H, W, C_OUT]
Returns of arm_nn_conv_f32_is_small_c_3x3
Description
true if the shape uses the small-C route, subject to its coordinate bounds
function

The shape part of the packed-patch GEMM route: at least ARMNNCONVNHWCPATCHGEMMF16MINOC output channels and ARMNNCONVNHWCPATCHGEMMF16MINPOS output positions per…

Include/arm_nnsupportfunctions_flt.h:1843

static bool arm_nn_conv_flt_is_patch_gemm(const cmsis_nn_dims *output_dims)

The shape part of the packed-patch GEMM route: at least ARM_NN_CONV_NHWC_PATCH_GEMM_F16_MIN_OC output channels and ARM_NN_CONV_NHWC_PATCH_GEMM_F16_MIN_POS output positions per batch (the float32 thresholds are equal). The router also needs ctx to hold one patch row (KH x KW x C_IN elements).

Parameters of arm_nn_conv_flt_is_patch_gemm
NameTypeDirectionDescription
output_dimsconst cmsis_nn_dims *inOutput dimensions [N, H, W, C_OUT]
Returns of arm_nn_conv_flt_is_patch_gemm
Description
true if the shape takes the packed-patch GEMM route when ctx is large enough
function

The depthwise conv1d k3 route of armdepthwiseconvf16(): batch 1, channel multiplier 1, a 1x3 filter, input and output height 1, unit stride and dilation, no pa…

Include/arm_nnsupportfunctions_flt.h:1859

static bool arm_nn_dw_f16_is_1d_k3(
const cmsis_nn_dw_conv_params_f16 *dw_conv_params,
const cmsis_nn_dims *input_dims,
const cmsis_nn_dims *filter_dims,
const cmsis_nn_dims *output_dims
)

The depthwise conv1d k3 route of arm_depthwise_conv_f16(): batch 1, channel multiplier 1, a 1x3 filter, input and output height 1, unit stride and dilation, no padding.

Parameters of arm_nn_dw_f16_is_1d_k3
NameTypeDirectionDescription
dw_conv_paramsconst cmsis_nn_dw_conv_params_f16 *inDepthwise parameters
input_dimsconst cmsis_nn_dims *inInput dimensions [N, H, W, C_IN]
filter_dimsconst cmsis_nn_dims *inFilter dimensions [1, HK, WK, C_OUT]
output_dimsconst cmsis_nn_dims *inOutput dimensions [N, H, W, C_OUT]
Returns of arm_nn_dw_f16_is_1d_k3
Description
true if the router takes the conv1d k3 route (unless NN_DISABLE_SPECIALIZATION is defined)
function

The depthwise 2x5 route of armdepthwiseconvf16(): a 2x5 filter, input height 2, output height 1, unit stride and dilation, no padding; any batch and channel mu…

Include/arm_nnsupportfunctions_flt.h:1879

static bool arm_nn_dw_f16_is_2x5(
const cmsis_nn_dw_conv_params_f16 *dw_conv_params,
const cmsis_nn_dims *input_dims,
const cmsis_nn_dims *filter_dims,
const cmsis_nn_dims *output_dims
)

The depthwise 2x5 route of arm_depthwise_conv_f16(): a 2x5 filter, input height 2, output height 1, unit stride and dilation, no padding; any batch and channel multiplier.

Parameters of arm_nn_dw_f16_is_2x5
NameTypeDirectionDescription
dw_conv_paramsconst cmsis_nn_dw_conv_params_f16 *inDepthwise parameters
input_dimsconst cmsis_nn_dims *inInput dimensions [N, H, W, C_IN]
filter_dimsconst cmsis_nn_dims *inFilter dimensions [1, HK, WK, C_OUT]
output_dimsconst cmsis_nn_dims *inOutput dimensions [N, H, W, C_OUT]
Returns of arm_nn_dw_f16_is_2x5
Description
true if the router takes the 2x5 route (unless NN_DISABLE_SPECIALIZATION is defined)
function

The shape part of the depthwise one-input-channel route of armdepthwiseconvf16() on MVE float builds: one input channel and at least CONVERTDWCONVWITHONEINPUTC…

Include/arm_nnsupportfunctions_flt.h:1899

static bool arm_nn_dw_f16_is_cin1(const cmsis_nn_dims *input_dims, const cmsis_nn_dims *output_dims)

The shape part of the depthwise one-input-channel route of arm_depthwise_conv_f16() on MVE float builds: one input channel and at least CONVERT_DW_CONV_WITH_ONE_INPUT_CH_AND_OUTPUT_CH_ABOVE_THRESHOLD output channels (the threshold depends on the compiler). The router takes the route after the channel-multiplier-1 route, and only when ctx->size is at least arm_nn_dw_f16_cin1_min_ctx_size; otherwise it takes the generic route.

Parameters of arm_nn_dw_f16_is_cin1
NameTypeDirectionDescription
input_dimsconst cmsis_nn_dims *inInput dimensions [N, H, W, C_IN]
output_dimsconst cmsis_nn_dims *inOutput dimensions [N, H, W, C_OUT]
Returns of arm_nn_dw_f16_is_cin1
Description
true if the shape takes the one-input-channel route when ctx is large enough
function

The least ctx->size, in bytes, of the depthwise one-input-channel route: the filter packed in blocks of 8 output channels, then one patch row of KH x KW elemen…

Include/arm_nnsupportfunctions_flt.h:1912

static int64_t arm_nn_dw_f16_cin1_min_ctx_size(const cmsis_nn_dims *filter_dims, const cmsis_nn_dims *output_dims)

The least ctx->size, in bytes, of the depthwise one-input-channel route: the filter packed in blocks of 8 output channels, then one patch row of KH x KW elements. More scratch packs more patch rows per step.

Parameters of arm_nn_dw_f16_cin1_min_ctx_size
NameTypeDirectionDescription
filter_dimsconst cmsis_nn_dims *inFilter dimensions [1, HK, WK, C_OUT]
output_dimsconst cmsis_nn_dims *inOutput dimensions [N, H, W, C_OUT]
Returns of arm_nn_dw_f16_cin1_min_ctx_size
Description
the size in bytes (64 bits, so that the caller can bound it), or INT64_MAX for a negative dimension or more than INT32_MAX taps, which no ctx can hold