Widen a float16 vector to float32.
arm_cmsis_nn_status arm_dequantize_f16_f32(const float16_t *input, float32_t *output, int32_t block_size)Widen a float16 vector to float32.
Bit-exact widening of every input class: finite values, subnormals (normal in float32), +/-0 and +/-Inf convert exactly. No accumulation, no rounding. NaN behavior: on every leg a NaN stays a NaN with its sign, quiet bit and payload preserved bit-exactly (a signaling NaN stays signaling). The scalar leg widens on integer lanes and raises no floating-point exception flag. The MVE leg converts each 8-element block with the vector VCVT first and then rebuilds the NaN lanes from the half’s bits (per 4-lane vector, 8 elements per main-loop block), so a signaling-NaN input may leave FPSCR.IOC (invalid operation, cumulative) set on that leg; no trap, and the result is the same bits. Input and output must not overlap. Serves the f16-weights DEQUANTIZE op (kws_float_fp16_weights).
Parameters
| Name | Type | Direction | Description |
|---|---|---|---|
input | const float16_t * | in | Pointer to the float16 input vector. |
output | float32_t * | out | Pointer to the float32 output vector. |
block_size | int32_t | in | Number of elements (0 is a no-op). |
Returns
| Description |
|---|
| `ARM_CMSIS_NN_SUCCESS`, or `ARM_CMSIS_NN_ARG_ERROR` when `block_size` is negative or a pointer is NULL with a non-zero `block_size`. |