defines

SocCapabilityclassSoC capabilities that kernel selection and the operator checks read.
MemoryTypeclassThe memories a target can have, spelled in lowercase in configuration (sram).
SocPlatformclassBase class for SoC platforms

SocCapability()

SoC capabilities that kernel selection and the operator checks read.

MCU = auto()

A Cortex-M core, which the portable kernels need.

DSP = auto()

The Arm DSP extension.

MVE = auto()

The M-profile Vector Extension (Helium).

FP16 = auto()

Native half-precision float (Armv8.1-M MVE-FP).

NPU = auto()

An attached Arm Ethos-U NPU.

MemoryType()

The memories a target can have, spelled in lowercase in configuration (sram).

MRAM = auto()

SRAM = auto()

DTCM = auto()

ITCM = auto()

DRAM = auto()

PSRAM = auto()

SocPlatform()

Base class for SoC platforms

Provisional: importable, but outside the compatibility promise; a minor release can change or remove it.

name: str = Field(..., description='Unique platform name')

Unique platform name

min_alignment: int | None = Field(..., description='Minimum alignment requirement in bytes')

Minimum alignment requirement in bytes

cpu: str = Field(default='cortex-m4', description='CPU architecture')

speeds: list[int] = Field(default_factory=list, description='List of supported clock speeds in MHz')

Declared clock speeds in MHz, for display only

memories: dict[MemoryType, int] = Field(default_factory=dict, description='Memory sizes in bytes')

Memory sizes in bytes

capabilities: list[SocCapability] = Field(default_factory=list, description='List of SoC capabilities')

List of SoC capabilities

preferred_memory_order: list[MemoryType] = Field(default_factory=list, description='Preferred memory order for allocations')

Preferred memory order for allocations

supports_fp16: bool

Whether this platform supports Armv8.1-M MVE-FP / FP16 kernels.

Resolution order:

When :attr:SocCapability.FP16 is declared explicitly, it is honored as a platform/toolchain capability. It is rejected only when it contradicts a known non-FP16 core (_NON_FP16_CPUS, e.g. Cortex-M4/M7/M33); unknown or custom CPUs are trusted so bespoke or future MVE-FP targets can opt in through the extension point without a library change.
When the capability is absent, FP16 is inferred from a normalized (case-insensitive) match of :attr:cpu against the known FP16-capable cores (_FP16_CPUS) for backward compatibility with platforms that only set cpu.

supports_npu: bool

Whether this platform declares an attached NPU (Arm Ethos-U).

Unlike :attr:supports_fp16 there is no CPU-based inference: the NPU is a discrete accelerator that cannot be deduced from the core, so the capability must be declared explicitly via :attr:SocCapability.NPU. Operators that generate NPU-only code (e.g. the Ethos-U custom operator) use this to reject conversion for platforms without an accelerator at convert time, instead of failing later in the integrator’s build.