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API Reference
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Targets

Select a target with --platform.name. Its registry definition supplies memory capacities, alignment and capabilities for planning and kernel selection. Run helia-aot platforms list to inspect your installed version.

An invalid FP16 declaration is reported explicitly; discovery does not repair it or change conversion validation.

Reserve application space with memory constraints. Registry capacities are the totals a program links into and reserve nothing for the application; registration alone does not establish hardware validation. For custom definitions, follow the target guide.

Target CPU Memories Preferred order Alignment Clocks (MHz) FP16
apollo330mp_evb cortex-m55 MRAM, SRAM, DTCM DTCM → SRAM → MRAM 16 96, 192, 250 yes
apollo3_blue_evb cortex-m4 MRAM, SRAM, DTCM DTCM → SRAM → MRAM 4 48, 96 no
apollo3_blue_plus_evb cortex-m4 MRAM, SRAM, DTCM DTCM → SRAM → MRAM 4 48, 96 no
apollo3_blue_thin_evb cortex-m4 MRAM, SRAM, DTCM DTCM → SRAM → MRAM 4 48, 96 no
apollo3_evb cortex-m4 MRAM, SRAM, DTCM DTCM → SRAM → MRAM 4 48, 96 no
apollo3p_evb cortex-m4 MRAM, SRAM, DTCM DTCM → SRAM → MRAM 4 48, 96 no
apollo4l_blue_evb cortex-m4 MRAM, SRAM, DTCM DTCM → SRAM → MRAM 4 96, 192 no
apollo4l_evb cortex-m4 MRAM, SRAM, DTCM DTCM → SRAM → MRAM 4 96, 192 no
apollo4p_blue_kbr_evb cortex-m4 MRAM, SRAM, DTCM DTCM → SRAM → MRAM 4 96, 192 no
apollo4p_blue_kxr_evb cortex-m4 MRAM, SRAM, DTCM DTCM → SRAM → MRAM 4 96, 192 no
apollo4p_evb cortex-m4 MRAM, SRAM, DTCM DTCM → SRAM → MRAM 4 96, 192 no
apollo510_evb cortex-m55 MRAM, SRAM, DTCM, ITCM, PSRAM DTCM → SRAM → MRAM → PSRAM 16 96, 250 yes
apollo510b_evb cortex-m55 MRAM, SRAM, DTCM, ITCM, PSRAM DTCM → SRAM → MRAM → PSRAM 16 96, 250 yes
apollo510l_evb cortex-m55 MRAM, SRAM, DTCM DTCM → SRAM → MRAM 16 96, 192, 250 yes
atomiq110 cortex-m55 MRAM, SRAM, DTCM, ITCM DTCM → SRAM → MRAM 16 100, 250, 500 yes

apollo330mp_evb

Section titled “apollo330mp_evb”
Property Value
CPU cortex-m55
Capabilities MCU, DSP, MVE, FP16
Clock speeds (MHz) 96, 192, 250
Minimum alignment (bytes) 16
Preferred memory order DTCM → SRAM → MRAM
FP16 kernels yes
Memory Bytes
MRAM 2031616
SRAM 1835008
DTCM 245760

apollo3_blue_evb

Section titled “apollo3_blue_evb”
Property Value
CPU cortex-m4
Capabilities MCU, DSP
Clock speeds (MHz) 48, 96
Minimum alignment (bytes) 4
Preferred memory order DTCM → SRAM → MRAM
FP16 kernels no
Memory Bytes
MRAM 1048576
SRAM 327680
DTCM 65536

apollo3_blue_plus_evb

Section titled “apollo3_blue_plus_evb”
Property Value
CPU cortex-m4
Capabilities MCU, DSP
Clock speeds (MHz) 48, 96
Minimum alignment (bytes) 4
Preferred memory order DTCM → SRAM → MRAM
FP16 kernels no
Memory Bytes
MRAM 2097152
SRAM 720896
DTCM 65536

apollo3_blue_thin_evb

Section titled “apollo3_blue_thin_evb”
Property Value
CPU cortex-m4
Capabilities MCU, DSP
Clock speeds (MHz) 48, 96
Minimum alignment (bytes) 4
Preferred memory order DTCM → SRAM → MRAM
FP16 kernels no
Memory Bytes
MRAM 1048576
SRAM 327680
DTCM 65536

apollo3_evb

Section titled “apollo3_evb”
Property Value
CPU cortex-m4
Capabilities MCU, DSP
Clock speeds (MHz) 48, 96
Minimum alignment (bytes) 4
Preferred memory order DTCM → SRAM → MRAM
FP16 kernels no
Memory Bytes
MRAM 1048576
SRAM 327680
DTCM 65536

apollo3p_evb

Section titled “apollo3p_evb”
Property Value
CPU cortex-m4
Capabilities MCU, DSP
Clock speeds (MHz) 48, 96
Minimum alignment (bytes) 4
Preferred memory order DTCM → SRAM → MRAM
FP16 kernels no
Memory Bytes
MRAM 2097152
SRAM 720896
DTCM 65536

apollo4l_blue_evb

Section titled “apollo4l_blue_evb”
Property Value
CPU cortex-m4
Capabilities MCU, DSP
Clock speeds (MHz) 96, 192
Minimum alignment (bytes) 4
Preferred memory order DTCM → SRAM → MRAM
FP16 kernels no
Memory Bytes
MRAM 2048000
SRAM 1048576
DTCM 393216

apollo4l_evb

Section titled “apollo4l_evb”
Property Value
CPU cortex-m4
Capabilities MCU, DSP
Clock speeds (MHz) 96, 192
Minimum alignment (bytes) 4
Preferred memory order DTCM → SRAM → MRAM
FP16 kernels no
Memory Bytes
MRAM 2048000
SRAM 1048576
DTCM 393216

apollo4p_blue_kbr_evb

Section titled “apollo4p_blue_kbr_evb”
Property Value
CPU cortex-m4
Capabilities MCU, DSP
Clock speeds (MHz) 96, 192
Minimum alignment (bytes) 4
Preferred memory order DTCM → SRAM → MRAM
FP16 kernels no
Memory Bytes
MRAM 2048000
SRAM 1048576
DTCM 393216

apollo4p_blue_kxr_evb

Section titled “apollo4p_blue_kxr_evb”
Property Value
CPU cortex-m4
Capabilities MCU, DSP
Clock speeds (MHz) 96, 192
Minimum alignment (bytes) 4
Preferred memory order DTCM → SRAM → MRAM
FP16 kernels no
Memory Bytes
MRAM 2048000
SRAM 1048576
DTCM 393216

apollo4p_evb

Section titled “apollo4p_evb”
Property Value
CPU cortex-m4
Capabilities MCU, DSP
Clock speeds (MHz) 96, 192
Minimum alignment (bytes) 4
Preferred memory order DTCM → SRAM → MRAM
FP16 kernels no
Memory Bytes
MRAM 2048000
SRAM 1048576
DTCM 393216

apollo510_evb

Section titled “apollo510_evb”
Property Value
CPU cortex-m55
Capabilities MCU, DSP, MVE, FP16
Clock speeds (MHz) 96, 250
Minimum alignment (bytes) 16
Preferred memory order DTCM → SRAM → MRAM → PSRAM
FP16 kernels yes
Memory Bytes
MRAM 4128768
SRAM 3145728
DTCM 507904
ITCM 262144
PSRAM 67108864

apollo510b_evb

Section titled “apollo510b_evb”
Property Value
CPU cortex-m55
Capabilities MCU, DSP, MVE, FP16
Clock speeds (MHz) 96, 250
Minimum alignment (bytes) 16
Preferred memory order DTCM → SRAM → MRAM → PSRAM
FP16 kernels yes
Memory Bytes
MRAM 4128768
SRAM 3145728
DTCM 507904
ITCM 262144
PSRAM 67108864

apollo510l_evb

Section titled “apollo510l_evb”
Property Value
CPU cortex-m55
Capabilities MCU, DSP, MVE, FP16
Clock speeds (MHz) 96, 192, 250
Minimum alignment (bytes) 16
Preferred memory order DTCM → SRAM → MRAM
FP16 kernels yes
Memory Bytes
MRAM 2031616
SRAM 1835008
DTCM 245760

atomiq110

Section titled “atomiq110”
Property Value
CPU cortex-m55
Capabilities MCU, DSP, MVE, FP16, NPU
Clock speeds (MHz) 100, 250, 500
Minimum alignment (bytes) 16
Preferred memory order DTCM → SRAM → MRAM
FP16 kernels yes
Memory Bytes
MRAM 4194304
SRAM 3145728
DTCM 507904
ITCM 262144