File ns_mpu6050_i2c_driver.c

FileList > neuralspot > neuralspot > ns-i2c > src > ns_mpu6050_i2c_driver.c

Go to the source code of this file

• #include "ns_mpu6050_i2c_driver.h"
• #include "am_bsp.h"
• #include "am_mcu_apollo.h"
• #include "am_util.h"
• #include "ns_i2c_register_driver.h"
• #include <limits.h>
• #include <stdlib.h>

Public Functions

Type	Name
uint32_t	mpu6050_calibration (ns_i2c_config_t * cfg, uint32_t devAddr) Calibrate device offsets. Device must be still on a flat surface.
uint32_t	mpu6050_get_accel_offset (ns_i2c_config_t * cfg, uint32_t devAddr, uint8_t axis, uint16_t * offset)
uint32_t	mpu6050_get_gyro_offset (ns_i2c_config_t * cfg, uint32_t devAddr, uint8_t axis, uint16_t * offset)

Public Static Functions

Type	Name
int8_t	get_high_bits (int16_t regReading)
int8_t	get_low_bits (int16_t regReading)
uint32_t	read_word_register (ns_i2c_config_t * cfg, uint32_t devAddr, uint8_t reg, uint16_t * value)

Macros

Type	Name
define	ACCEL_CONFIG 0x1C
define	ACCEL_XOUT_H 0x3B
define	ACCEL_XOUT_L 0x3C
define	ACCEL_YOUT_H 0x3D
define	ACCEL_YOUT_L 0x3E
define	ACCEL_ZOUT_H 0x3F
define	ACCEL_ZOUT_L 0x40
define	ACONFIG_FS_SEL_BIT 4
define	ACONFIG_FS_SEL_LENGTH 2
define	ACONFIG_HPF_BIT 2
define	ACONFIG_HPF_LENGTH 3
define	ACONFIG_XA_ST_BIT 7
define	ACONFIG_YA_ST_BIT 6
define	ACONFIG_ZA_ST_BIT 5
define	BANKSEL_CFG_USER_BANK_BIT 5
define	BANKSEL_MEM_SEL_BIT 4
define	BANKSEL_MEM_SEL_LENGTH 5
define	BANKSEL_PRFTCH_EN_BIT 6
define	BANK_SEL 0x6D
define	CONFIG 0x1A
define	CONFIG_DLPF_CFG_BIT 2
define	CONFIG_DLPF_CFG_LENGTH 3
define	CONFIG_EXT_SYNC_SET_BIT 5
define	CONFIG_EXT_SYNC_SET_LENGTH 3
define	CONFIG_FIFO_MODE_BIT 6
define	DMP_INT_STATUS 0x39
define	DMP_INT_STATUS_0 0
define	DMP_INT_STATUS_1 1
define	DMP_INT_STATUS_2 2
define	DMP_INT_STATUS_3 3
define	DMP_INT_STATUS_4 4
define	DMP_INT_STATUS_5 5
define	EXT_SENS_DATA_00 0x49
define	EXT_SENS_DATA_01 0x4A
define	EXT_SENS_DATA_02 0x4B
define	EXT_SENS_DATA_03 0x4C
define	EXT_SENS_DATA_04 0x4D
define	EXT_SENS_DATA_05 0x4E
define	EXT_SENS_DATA_06 0x4F
define	EXT_SENS_DATA_07 0x50
define	EXT_SENS_DATA_08 0x51
define	EXT_SENS_DATA_09 0x52
define	EXT_SENS_DATA_10 0x53
define	EXT_SENS_DATA_11 0x54
define	EXT_SENS_DATA_12 0x55
define	EXT_SENS_DATA_13 0x56
define	EXT_SENS_DATA_14 0x57
define	EXT_SENS_DATA_15 0x58
define	EXT_SENS_DATA_17 0x5A
define	EXT_SENS_DATA_18 0x5B
define	EXT_SENS_DATA_19 0x5C
define	EXT_SENS_DATA_20 0x5D
define	EXT_SENS_DATA_21 0x5E
define	EXT_SENS_DATA_22 0x5F
define	EXT_SENS_DATA_23 0x60
define	FF_DUR 0x1E
define	FF_THR 0x1D
define	FIFO_ACCEL_EN_BIT 3
define	FIFO_COUNT_H 0x72
define	FIFO_COUNT_L 0x73
define	FIFO_EN 0x23
define	FIFO_R_W 0x74
define	FIFO_SLV_0_EN_BIT 0
define	FIFO_SLV_1_EN_BIT 1
define	FIFO_SLV_2_EN_BIT 2
define	FIFO_TEMP_EN_BIT 7
define	FIFO_XGYRO_EN_BIT 6
define	FIFO_YGYRO_EN_BIT 5
define	FIFO_ZGYRO_EN_BIT 4
define	GCONFIG_FCHOICE_B 1
define	GCONFIG_FCHOICE_B_LENGTH 2
define	GCONFIG_FS_SEL_BIT 4
define	GCONFIG_FS_SEL_LENGTH 2
define	GCONFIG_XG_ST_BIT 7
define	GCONFIG_YG_ST_BIT 6
define	GCONFIG_ZG_ST_BIT 5
define	GYRO_CONFIG 0x1B
define	GYRO_XOUT_H 0x43
define	GYRO_XOUT_L 0x44
define	GYRO_YOUT_H 0x45
define	GYRO_YOUT_L 0x46
define	GYRO_ZOUT_H 0x47
define	GYRO_ZOUT_L 0x48
define	I2CMST_CTRL_CLOCK_BIT 3
define	I2CMST_CTRL_CLOCK_LENGTH 4
define	I2CMST_CTRL_MULT_EN_BIT 7
define	I2CMST_CTRL_P_NSR_BIT 4
define	I2CMST_CTRL_SLV_3_FIFO_EN_BIT 5
define	I2CMST_CTRL_WAIT_FOR_ES_BIT 6
define	I2CMST_DLY_ES_SHADOW_BIT 7
define	I2CMST_DLY_SLV0_EN_BIT 0
define	I2CMST_DLY_SLV1_EN_BIT 1
define	I2CMST_DLY_SLV2_EN_BIT 2
define	I2CMST_DLY_SLV3_EN_BIT 3
define	I2CMST_DLY_SLV4_EN_BIT 4
define	I2CMST_STAT_LOST_ARB_BIT 5
define	I2CMST_STAT_PASS_THROUGH_BIT 7
define	I2CMST_STAT_SLV0_NACK_BIT 0
define	I2CMST_STAT_SLV1_NACK_BIT 1
define	I2CMST_STAT_SLV2_NACK_BIT 2
define	I2CMST_STAT_SLV3_NACK_BIT 3
define	I2CMST_STAT_SLV4_DONE_BIT 6
define	I2CMST_STAT_SLV4_NACK_BIT 4
define	I2C_MST_CTRL 0x24
define	I2C_MST_DELAY_CRTL 0x67
define	I2C_MST_STATUS 0x36
define	I2C_SLV0_ADDR 0x25
define	I2C_SLV0_CTRL 0x27
define	I2C_SLV0_DO 0x63
define	I2C_SLV0_REG 0x26
define	I2C_SLV1_ADDR 0x28
define	I2C_SLV1_CTRL 0x2A
define	I2C_SLV1_DO 0x64
define	I2C_SLV1_REG 0x29
define	I2C_SLV2_ADDR 0x2B
define	I2C_SLV2_CTRL 0x2D
define	I2C_SLV2_DO 0x65
define	I2C_SLV2_REG 0x2C
define	I2C_SLV3_ADDR 0x2E
define	I2C_SLV3_CTRL 0x30
define	I2C_SLV3_DO 0x66
define	I2C_SLV3_REG 0x2F
define	I2C_SLV4_ADDR 0x31
define	I2C_SLV4_CTRL 0x34
define	I2C_SLV4_DI 0x35
define	I2C_SLV4_DO 0x33
define	I2C_SLV4_DONE_INT_BIT 6
define	I2C_SLV4_EN_BIT 7
define	I2C_SLV4_MST_DELAY_BIT 4
define	I2C_SLV4_MST_DELAY_LENGTH 5
define	I2C_SLV4_REG 0x32
define	I2C_SLV4_REG_DIS_BIT 5
define	I2C_SLV_BYTE_SW_BIT 6
define	I2C_SLV_EN_BIT 7
define	I2C_SLV_GRP_BIT 4
define	I2C_SLV_ID_BIT 6
define	I2C_SLV_ID_LENGTH 7
define	I2C_SLV_LEN_BIT 3
define	I2C_SLV_LEN_LENGTH 4
define	I2C_SLV_REG_DIS_BIT 5
define	I2C_SLV_RNW_BIT 7
define	INT_CFG_ANYRD_2CLEAR_BIT 4
define	INT_CFG_CLOCKOUT_EN_BIT 0
define	INT_CFG_FSYNC_INT_MODE_EN_BIT 2
define	INT_CFG_FSYNC_LEVEL_BIT 3
define	INT_CFG_I2C_BYPASS_EN_BIT 1
define	INT_CFG_LATCH_EN_BIT 5
define	INT_CFG_LEVEL_BIT 7
define	INT_CFG_OPEN_BIT 6
define	INT_ENABLE 0x38
define	INT_ENABLE_DMP_RDY_BIT 1
define	INT_ENABLE_FIFO_OFLOW_BIT 4
define	INT_ENABLE_FREEFALL_BIT 7
define	INT_ENABLE_I2C_MST_FSYNC_BIT 3
define	INT_ENABLE_MOTION_BIT 6
define	INT_ENABLE_PLL_RDY_BIT 2
define	INT_ENABLE_RAW_DATA_RDY_BIT 0
define	INT_ENABLE_ZEROMOT_BIT 5
define	INT_PIN_CONFIG 0x37
define	INT_STATUS 0x3A
define	INT_STATUS_DMP_RDY_BIT 1
define	INT_STATUS_FIFO_OFLOW_BIT 4
define	INT_STATUS_FREEFALL_BIT 7
define	INT_STATUS_I2C_MST_BIT 3
define	INT_STATUS_MOTION_BIT 6
define	INT_STATUS_PLL_RDY_BIT 2
define	INT_STATUS_RAW_DATA_RDY_BIT 0
define	INT_STATUS_ZEROMOT_BIT 5
define	MEM_R_W 0x6F
define	MEM_START_ADDR 0x6E
define	MOTION_DUR 0x20
define	MOTION_THR 0x1F
define	MPU6050_RA_XA_OFFS_H 0x06
define	MPU6050_RA_XA_OFFS_L 0x07
define	MPU6050_RA_YA_OFFS_H 0x08
define	MPU6050_RA_YA_OFFS_L 0x09
define	MPU6050_RA_ZA_OFFS_H 0x0A
define	MPU6050_RA_ZA_OFFS_L 0x0B
define	PRGM_START_H 0x70
define	PRGM_START_L 0x71
define	PWR1_CLKSEL_BIT 2
define	PWR1_CLKSEL_LENGTH 3
define	PWR1_CYCLE_BIT 5
define	PWR1_DEVICE_RESET_BIT 7
define	PWR1_GYRO_STANDBY_BIT 4
define	PWR1_SLEEP_BIT 6
define	PWR1_TEMP_DIS_BIT 3
define	PWR2_LP_WAKE_CTRL_BIT 7
define	PWR2_LP_WAKE_CTRL_LENGTH 2
define	PWR2_STBY_XA_BIT 5
define	PWR2_STBY_XG_BIT 2
define	PWR2_STBY_XYZA_BITS 1 << PWR2\_STBY\_XA\_BIT \| 1 << PWR2\_STBY\_YA\_BIT \| 1 << PWR2\_STBY\_ZA\_BIT
define	PWR2_STBY_XYZG_BITS 1 << PWR2\_STBY\_XG\_BIT \| 1 << PWR2\_STBY\_YG\_BIT \| 1 << PWR2\_STBY\_ZG\_BIT
define	PWR2_STBY_YA_BIT 4
define	PWR2_STBY_YG_BIT 1
define	PWR2_STBY_ZA_BIT 3
define	PWR2_STBY_ZG_BIT 0
define	PWR_MGMT1 0x6B
define	PWR_MGMT2 0x6C
define	SIGNAL_PATH_RESET 0x68
define	SMPLRT_DIV 0x19
define	SPATH_ACCEL_RST_BIT 1
define	SPATH_GYRO_RST_BIT 2
define	SPATH_TEMP_RST_BIT 0
define	TEMP_OUT_H 0x41
define	TEMP_OUT_L 0x42
define	USERCTRL_DMP_EN_BIT 7
define	USERCTRL_DMP_RESET_BIT 3
define	USERCTRL_FIFO_EN_BIT 6
define	USERCTRL_FIFO_RESET_BIT 2
define	USERCTRL_I2C_IF_DIS_BIT 4
define	USERCTRL_I2C_MST_EN_BIT 5
define	USERCTRL_I2C_MST_RESET_BIT 1
define	USERCTRL_SIG_COND_RESET_BIT 0
define	USER_CTRL 0x6A
define	WHO_AM_I 0x75
define	XG_OFFSET_H 0x13
define	XG_OFFSET_L 0x14
define	YG_OFFSET_H 0x15
define	YG_OFFSET_L 0x16
define	ZG_OFFSET_H 0x17
define	ZG_OFFSET_L 0x18
define	ZRMOTION_DUR 0x22
define	ZRMOTION_THR 0x21

Public Functions Documentation

function mpu6050_calibration

Calibrate device offsets. Device must be still on a flat surface.

uint32_t mpu6050_calibration (
    ns_i2c_config_t * cfg,
    uint32_t devAddr
) 

Parameters:

• cfg I2C configuration
• devAddr Device I2C address

Returns:

uint32_t status

---

function mpu6050_get_accel_offset

uint32_t mpu6050_get_accel_offset (
    ns_i2c_config_t * cfg,
    uint32_t devAddr,
    uint8_t axis,
    uint16_t * offset
) 

---

function mpu6050_get_gyro_offset

uint32_t mpu6050_get_gyro_offset (
    ns_i2c_config_t * cfg,
    uint32_t devAddr,
    uint8_t axis,
    uint16_t * offset
) 

---

Public Static Functions Documentation

function get_high_bits

static int8_t get_high_bits (
    int16_t regReading
) 

---

function get_low_bits

static int8_t get_low_bits (
    int16_t regReading
) 

---

function read_word_register

static uint32_t read_word_register (
    ns_i2c_config_t * cfg,
    uint32_t devAddr,
    uint8_t reg,
    uint16_t * value
) 

---

Macro Definition Documentation

define ACCEL_CONFIG

#define ACCEL_CONFIG `0x1C`

---

define ACCEL_XOUT_H

#define ACCEL_XOUT_H `0x3B`

---

define ACCEL_XOUT_L

#define ACCEL_XOUT_L `0x3C`

---

define ACCEL_YOUT_H

#define ACCEL_YOUT_H `0x3D`

---

define ACCEL_YOUT_L

#define ACCEL_YOUT_L `0x3E`

---

define ACCEL_ZOUT_H

#define ACCEL_ZOUT_H `0x3F`

---

define ACCEL_ZOUT_L

#define ACCEL_ZOUT_L `0x40`

---

define ACONFIG_FS_SEL_BIT

#define ACONFIG_FS_SEL_BIT `4`

---

define ACONFIG_FS_SEL_LENGTH

#define ACONFIG_FS_SEL_LENGTH `2`

---

define ACONFIG_HPF_BIT

#define ACONFIG_HPF_BIT `2`

---

define ACONFIG_HPF_LENGTH

#define ACONFIG_HPF_LENGTH `3`

---

define ACONFIG_XA_ST_BIT

#define ACONFIG_XA_ST_BIT `7`

---

define ACONFIG_YA_ST_BIT

#define ACONFIG_YA_ST_BIT `6`

---

define ACONFIG_ZA_ST_BIT

#define ACONFIG_ZA_ST_BIT `5`

---

define BANKSEL_CFG_USER_BANK_BIT

#define BANKSEL_CFG_USER_BANK_BIT `5`

---

define BANKSEL_MEM_SEL_BIT

#define BANKSEL_MEM_SEL_BIT `4`

---

define BANKSEL_MEM_SEL_LENGTH

#define BANKSEL_MEM_SEL_LENGTH `5`

---

define BANKSEL_PRFTCH_EN_BIT

#define BANKSEL_PRFTCH_EN_BIT `6`

---

define BANK_SEL

#define BANK_SEL `0x6D`

---

define CONFIG

#define CONFIG `0x1A`

---

define CONFIG_DLPF_CFG_BIT

#define CONFIG_DLPF_CFG_BIT `2`

---

define CONFIG_DLPF_CFG_LENGTH

#define CONFIG_DLPF_CFG_LENGTH `3`

---

define CONFIG_EXT_SYNC_SET_BIT

#define CONFIG_EXT_SYNC_SET_BIT `5`

---

define CONFIG_EXT_SYNC_SET_LENGTH

#define CONFIG_EXT_SYNC_SET_LENGTH `3`

---

define CONFIG_FIFO_MODE_BIT

#define CONFIG_FIFO_MODE_BIT `6`

---

define DMP_INT_STATUS

#define DMP_INT_STATUS `0x39`

---

define DMP_INT_STATUS_0

#define DMP_INT_STATUS_0 `0`

---

define DMP_INT_STATUS_1

#define DMP_INT_STATUS_1 `1`

---

define DMP_INT_STATUS_2

#define DMP_INT_STATUS_2 `2`

---

define DMP_INT_STATUS_3

#define DMP_INT_STATUS_3 `3`

---

define DMP_INT_STATUS_4

#define DMP_INT_STATUS_4 `4`

---

define DMP_INT_STATUS_5

#define DMP_INT_STATUS_5 `5`

---

define EXT_SENS_DATA_00

#define EXT_SENS_DATA_00 `0x49`

---

define EXT_SENS_DATA_01

#define EXT_SENS_DATA_01 `0x4A`

---

define EXT_SENS_DATA_02

#define EXT_SENS_DATA_02 `0x4B`

---

define EXT_SENS_DATA_03

#define EXT_SENS_DATA_03 `0x4C`

---

define EXT_SENS_DATA_04

#define EXT_SENS_DATA_04 `0x4D`

---

define EXT_SENS_DATA_05

#define EXT_SENS_DATA_05 `0x4E`

---

define EXT_SENS_DATA_06

#define EXT_SENS_DATA_06 `0x4F`

---

define EXT_SENS_DATA_07

#define EXT_SENS_DATA_07 `0x50`

---

define EXT_SENS_DATA_08

#define EXT_SENS_DATA_08 `0x51`

---

define EXT_SENS_DATA_09

#define EXT_SENS_DATA_09 `0x52`

---

define EXT_SENS_DATA_10

#define EXT_SENS_DATA_10 `0x53`

---

define EXT_SENS_DATA_11

#define EXT_SENS_DATA_11 `0x54`

---

define EXT_SENS_DATA_12

#define EXT_SENS_DATA_12 `0x55`

---

define EXT_SENS_DATA_13

#define EXT_SENS_DATA_13 `0x56`

---

define EXT_SENS_DATA_14

#define EXT_SENS_DATA_14 `0x57`

---

define EXT_SENS_DATA_15

#define EXT_SENS_DATA_15 `0x58`

---

define EXT_SENS_DATA_17

#define EXT_SENS_DATA_17 `0x5A`

---

define EXT_SENS_DATA_18

#define EXT_SENS_DATA_18 `0x5B`

---

define EXT_SENS_DATA_19

#define EXT_SENS_DATA_19 `0x5C`

---

define EXT_SENS_DATA_20

#define EXT_SENS_DATA_20 `0x5D`

---

define EXT_SENS_DATA_21

#define EXT_SENS_DATA_21 `0x5E`

---

define EXT_SENS_DATA_22

#define EXT_SENS_DATA_22 `0x5F`

---

define EXT_SENS_DATA_23

#define EXT_SENS_DATA_23 `0x60`

---

define FF_DUR

#define FF_DUR `0x1E`

---

define FF_THR

#define FF_THR `0x1D`

---

define FIFO_ACCEL_EN_BIT

#define FIFO_ACCEL_EN_BIT `3`

---

define FIFO_COUNT_H

#define FIFO_COUNT_H `0x72`

---

define FIFO_COUNT_L

#define FIFO_COUNT_L `0x73`

---

define FIFO_EN

#define FIFO_EN `0x23`

---

define FIFO_R_W

#define FIFO_R_W `0x74`

---

define FIFO_SLV_0_EN_BIT

#define FIFO_SLV_0_EN_BIT `0`

---

define FIFO_SLV_1_EN_BIT

#define FIFO_SLV_1_EN_BIT `1`

---

define FIFO_SLV_2_EN_BIT

#define FIFO_SLV_2_EN_BIT `2`

---

define FIFO_TEMP_EN_BIT

#define FIFO_TEMP_EN_BIT `7`

---

define FIFO_XGYRO_EN_BIT

#define FIFO_XGYRO_EN_BIT `6`

---

define FIFO_YGYRO_EN_BIT

#define FIFO_YGYRO_EN_BIT `5`

---

define FIFO_ZGYRO_EN_BIT

#define FIFO_ZGYRO_EN_BIT `4`

---

define GCONFIG_FCHOICE_B

#define GCONFIG_FCHOICE_B `1`

---

define GCONFIG_FCHOICE_B_LENGTH

#define GCONFIG_FCHOICE_B_LENGTH `2`

---

define GCONFIG_FS_SEL_BIT

#define GCONFIG_FS_SEL_BIT `4`

---

define GCONFIG_FS_SEL_LENGTH

#define GCONFIG_FS_SEL_LENGTH `2`

---

define GCONFIG_XG_ST_BIT

#define GCONFIG_XG_ST_BIT `7`

---

define GCONFIG_YG_ST_BIT

#define GCONFIG_YG_ST_BIT `6`

---

define GCONFIG_ZG_ST_BIT

#define GCONFIG_ZG_ST_BIT `5`

---

define GYRO_CONFIG

#define GYRO_CONFIG `0x1B`

---

define GYRO_XOUT_H

#define GYRO_XOUT_H `0x43`

---

define GYRO_XOUT_L

#define GYRO_XOUT_L `0x44`

---

define GYRO_YOUT_H

#define GYRO_YOUT_H `0x45`

---

define GYRO_YOUT_L

#define GYRO_YOUT_L `0x46`

---

define GYRO_ZOUT_H

#define GYRO_ZOUT_H `0x47`

---

define GYRO_ZOUT_L

#define GYRO_ZOUT_L `0x48`

---

define I2CMST_CTRL_CLOCK_BIT

#define I2CMST_CTRL_CLOCK_BIT `3`

---

define I2CMST_CTRL_CLOCK_LENGTH

#define I2CMST_CTRL_CLOCK_LENGTH `4`

---

define I2CMST_CTRL_MULT_EN_BIT

#define I2CMST_CTRL_MULT_EN_BIT `7`

---

define I2CMST_CTRL_P_NSR_BIT

#define I2CMST_CTRL_P_NSR_BIT `4`

---

define I2CMST_CTRL_SLV_3_FIFO_EN_BIT

#define I2CMST_CTRL_SLV_3_FIFO_EN_BIT `5`

---

define I2CMST_CTRL_WAIT_FOR_ES_BIT

#define I2CMST_CTRL_WAIT_FOR_ES_BIT `6`

---

define I2CMST_DLY_ES_SHADOW_BIT

#define I2CMST_DLY_ES_SHADOW_BIT `7`

---

define I2CMST_DLY_SLV0_EN_BIT

#define I2CMST_DLY_SLV0_EN_BIT `0`

---

define I2CMST_DLY_SLV1_EN_BIT

#define I2CMST_DLY_SLV1_EN_BIT `1`

---

define I2CMST_DLY_SLV2_EN_BIT

#define I2CMST_DLY_SLV2_EN_BIT `2`

---

define I2CMST_DLY_SLV3_EN_BIT

#define I2CMST_DLY_SLV3_EN_BIT `3`

---

define I2CMST_DLY_SLV4_EN_BIT

#define I2CMST_DLY_SLV4_EN_BIT `4`

---

define I2CMST_STAT_LOST_ARB_BIT

#define I2CMST_STAT_LOST_ARB_BIT `5`

---

define I2CMST_STAT_PASS_THROUGH_BIT

#define I2CMST_STAT_PASS_THROUGH_BIT `7`

---

define I2CMST_STAT_SLV0_NACK_BIT

#define I2CMST_STAT_SLV0_NACK_BIT `0`

---

define I2CMST_STAT_SLV1_NACK_BIT

#define I2CMST_STAT_SLV1_NACK_BIT `1`

---

define I2CMST_STAT_SLV2_NACK_BIT

#define I2CMST_STAT_SLV2_NACK_BIT `2`

---

define I2CMST_STAT_SLV3_NACK_BIT

#define I2CMST_STAT_SLV3_NACK_BIT `3`

---

define I2CMST_STAT_SLV4_DONE_BIT

#define I2CMST_STAT_SLV4_DONE_BIT `6`

---

define I2CMST_STAT_SLV4_NACK_BIT

#define I2CMST_STAT_SLV4_NACK_BIT `4`

---

define I2C_MST_CTRL

#define I2C_MST_CTRL `0x24`

---

define I2C_MST_DELAY_CRTL

#define I2C_MST_DELAY_CRTL `0x67`

---

define I2C_MST_STATUS

#define I2C_MST_STATUS `0x36`

---

define I2C_SLV0_ADDR

#define I2C_SLV0_ADDR `0x25`

---

define I2C_SLV0_CTRL

#define I2C_SLV0_CTRL `0x27`

---

define I2C_SLV0_DO

#define I2C_SLV0_DO `0x63`

---

define I2C_SLV0_REG

#define I2C_SLV0_REG `0x26`

---

define I2C_SLV1_ADDR

#define I2C_SLV1_ADDR `0x28`

---

define I2C_SLV1_CTRL

#define I2C_SLV1_CTRL `0x2A`

---

define I2C_SLV1_DO

#define I2C_SLV1_DO `0x64`

---

define I2C_SLV1_REG

#define I2C_SLV1_REG `0x29`

---

define I2C_SLV2_ADDR

#define I2C_SLV2_ADDR `0x2B`

---

define I2C_SLV2_CTRL

#define I2C_SLV2_CTRL `0x2D`

---

define I2C_SLV2_DO

#define I2C_SLV2_DO `0x65`

---

define I2C_SLV2_REG

#define I2C_SLV2_REG `0x2C`

---

define I2C_SLV3_ADDR

#define I2C_SLV3_ADDR `0x2E`

---

define I2C_SLV3_CTRL

#define I2C_SLV3_CTRL `0x30`

---

define I2C_SLV3_DO

#define I2C_SLV3_DO `0x66`

---

define I2C_SLV3_REG

#define I2C_SLV3_REG `0x2F`

---

define I2C_SLV4_ADDR

#define I2C_SLV4_ADDR `0x31`

---

define I2C_SLV4_CTRL

#define I2C_SLV4_CTRL `0x34`

---

define I2C_SLV4_DI

#define I2C_SLV4_DI `0x35`

---

define I2C_SLV4_DO

#define I2C_SLV4_DO `0x33`

---

define I2C_SLV4_DONE_INT_BIT

#define I2C_SLV4_DONE_INT_BIT `6`

---

define I2C_SLV4_EN_BIT

#define I2C_SLV4_EN_BIT `7`

---

define I2C_SLV4_MST_DELAY_BIT

#define I2C_SLV4_MST_DELAY_BIT `4`

---

define I2C_SLV4_MST_DELAY_LENGTH

#define I2C_SLV4_MST_DELAY_LENGTH `5`

---

define I2C_SLV4_REG

#define I2C_SLV4_REG `0x32`

---

define I2C_SLV4_REG_DIS_BIT

#define I2C_SLV4_REG_DIS_BIT `5`

---

define I2C_SLV_BYTE_SW_BIT

#define I2C_SLV_BYTE_SW_BIT `6`

---

define I2C_SLV_EN_BIT

#define I2C_SLV_EN_BIT `7`

---

define I2C_SLV_GRP_BIT

#define I2C_SLV_GRP_BIT `4`

---

define I2C_SLV_ID_BIT

#define I2C_SLV_ID_BIT `6`

---

define I2C_SLV_ID_LENGTH

#define I2C_SLV_ID_LENGTH `7`

---

define I2C_SLV_LEN_BIT

#define I2C_SLV_LEN_BIT `3`

---

define I2C_SLV_LEN_LENGTH

#define I2C_SLV_LEN_LENGTH `4`

---

define I2C_SLV_REG_DIS_BIT

#define I2C_SLV_REG_DIS_BIT `5`

---

define I2C_SLV_RNW_BIT

#define I2C_SLV_RNW_BIT `7`

---

define INT_CFG_ANYRD_2CLEAR_BIT

#define INT_CFG_ANYRD_2CLEAR_BIT `4`

---

define INT_CFG_CLOCKOUT_EN_BIT

#define INT_CFG_CLOCKOUT_EN_BIT `0`

---

define INT_CFG_FSYNC_INT_MODE_EN_BIT

#define INT_CFG_FSYNC_INT_MODE_EN_BIT `2`

---

define INT_CFG_FSYNC_LEVEL_BIT

#define INT_CFG_FSYNC_LEVEL_BIT `3`

---

define INT_CFG_I2C_BYPASS_EN_BIT

#define INT_CFG_I2C_BYPASS_EN_BIT `1`

---

define INT_CFG_LATCH_EN_BIT

#define INT_CFG_LATCH_EN_BIT `5`

---

define INT_CFG_LEVEL_BIT

#define INT_CFG_LEVEL_BIT `7`

---

define INT_CFG_OPEN_BIT

#define INT_CFG_OPEN_BIT `6`

---

define INT_ENABLE

#define INT_ENABLE `0x38`

---

define INT_ENABLE_DMP_RDY_BIT

#define INT_ENABLE_DMP_RDY_BIT `1`

---

define INT_ENABLE_FIFO_OFLOW_BIT

#define INT_ENABLE_FIFO_OFLOW_BIT `4`

---

define INT_ENABLE_FREEFALL_BIT

#define INT_ENABLE_FREEFALL_BIT `7`

---

define INT_ENABLE_I2C_MST_FSYNC_BIT

#define INT_ENABLE_I2C_MST_FSYNC_BIT `3`

---

define INT_ENABLE_MOTION_BIT

#define INT_ENABLE_MOTION_BIT `6`

---

define INT_ENABLE_PLL_RDY_BIT

#define INT_ENABLE_PLL_RDY_BIT `2`

---

define INT_ENABLE_RAW_DATA_RDY_BIT

#define INT_ENABLE_RAW_DATA_RDY_BIT `0`

---

define INT_ENABLE_ZEROMOT_BIT

#define INT_ENABLE_ZEROMOT_BIT `5`

---

define INT_PIN_CONFIG

#define INT_PIN_CONFIG `0x37`

---

define INT_STATUS

#define INT_STATUS `0x3A`

---

define INT_STATUS_DMP_RDY_BIT

#define INT_STATUS_DMP_RDY_BIT `1`

---

define INT_STATUS_FIFO_OFLOW_BIT

#define INT_STATUS_FIFO_OFLOW_BIT `4`

---

define INT_STATUS_FREEFALL_BIT

#define INT_STATUS_FREEFALL_BIT `7`

---

define INT_STATUS_I2C_MST_BIT

#define INT_STATUS_I2C_MST_BIT `3`

---

define INT_STATUS_MOTION_BIT

#define INT_STATUS_MOTION_BIT `6`

---

define INT_STATUS_PLL_RDY_BIT

#define INT_STATUS_PLL_RDY_BIT `2`

---

define INT_STATUS_RAW_DATA_RDY_BIT

#define INT_STATUS_RAW_DATA_RDY_BIT `0`

---

define INT_STATUS_ZEROMOT_BIT

#define INT_STATUS_ZEROMOT_BIT `5`

---

define MEM_R_W

#define MEM_R_W `0x6F`

---

define MEM_START_ADDR

#define MEM_START_ADDR `0x6E`

---

define MOTION_DUR

#define MOTION_DUR `0x20`

---

define MOTION_THR

#define MOTION_THR `0x1F`

---

define MPU6050_RA_XA_OFFS_H

#define MPU6050_RA_XA_OFFS_H `0x06`

---

define MPU6050_RA_XA_OFFS_L

#define MPU6050_RA_XA_OFFS_L `0x07`

---

define MPU6050_RA_YA_OFFS_H

#define MPU6050_RA_YA_OFFS_H `0x08`

---

define MPU6050_RA_YA_OFFS_L

#define MPU6050_RA_YA_OFFS_L `0x09`

---

define MPU6050_RA_ZA_OFFS_H

#define MPU6050_RA_ZA_OFFS_H `0x0A`

---

define MPU6050_RA_ZA_OFFS_L

#define MPU6050_RA_ZA_OFFS_L `0x0B`

---

define PRGM_START_H

#define PRGM_START_H `0x70`

---

define PRGM_START_L

#define PRGM_START_L `0x71`

---

define PWR1_CLKSEL_BIT

#define PWR1_CLKSEL_BIT `2`

---

define PWR1_CLKSEL_LENGTH

#define PWR1_CLKSEL_LENGTH `3`

---

define PWR1_CYCLE_BIT

#define PWR1_CYCLE_BIT `5`

---

define PWR1_DEVICE_RESET_BIT

#define PWR1_DEVICE_RESET_BIT `7`

---

define PWR1_GYRO_STANDBY_BIT

#define PWR1_GYRO_STANDBY_BIT `4`

---

define PWR1_SLEEP_BIT

#define PWR1_SLEEP_BIT `6`

---

define PWR1_TEMP_DIS_BIT

#define PWR1_TEMP_DIS_BIT `3`

---

define PWR2_LP_WAKE_CTRL_BIT

#define PWR2_LP_WAKE_CTRL_BIT `7`

---

define PWR2_LP_WAKE_CTRL_LENGTH

#define PWR2_LP_WAKE_CTRL_LENGTH `2`

---

define PWR2_STBY_XA_BIT

#define PWR2_STBY_XA_BIT `5`

---

define PWR2_STBY_XG_BIT

#define PWR2_STBY_XG_BIT `2`

---

define PWR2_STBY_XYZA_BITS

#define PWR2_STBY_XYZA_BITS `1 << PWR2_STBY_XA_BIT | 1 << PWR2_STBY_YA_BIT | 1 << PWR2_STBY_ZA_BIT`

---

define PWR2_STBY_XYZG_BITS

#define PWR2_STBY_XYZG_BITS `1 << PWR2_STBY_XG_BIT | 1 << PWR2_STBY_YG_BIT | 1 << PWR2_STBY_ZG_BIT`

---

define PWR2_STBY_YA_BIT

#define PWR2_STBY_YA_BIT `4`

---

define PWR2_STBY_YG_BIT

#define PWR2_STBY_YG_BIT `1`

---

define PWR2_STBY_ZA_BIT

#define PWR2_STBY_ZA_BIT `3`

---

define PWR2_STBY_ZG_BIT

#define PWR2_STBY_ZG_BIT `0`

---

define PWR_MGMT1

#define PWR_MGMT1 `0x6B`

---

define PWR_MGMT2

#define PWR_MGMT2 `0x6C`

---

define SIGNAL_PATH_RESET

#define SIGNAL_PATH_RESET `0x68`

---

define SMPLRT_DIV

#define SMPLRT_DIV `0x19`

---

define SPATH_ACCEL_RST_BIT

#define SPATH_ACCEL_RST_BIT `1`

---

define SPATH_GYRO_RST_BIT

#define SPATH_GYRO_RST_BIT `2`

---

define SPATH_TEMP_RST_BIT

#define SPATH_TEMP_RST_BIT `0`

---

define TEMP_OUT_H

#define TEMP_OUT_H `0x41`

---

define TEMP_OUT_L

#define TEMP_OUT_L `0x42`

---

define USERCTRL_DMP_EN_BIT

#define USERCTRL_DMP_EN_BIT `7`

---

define USERCTRL_DMP_RESET_BIT

#define USERCTRL_DMP_RESET_BIT `3`

---

define USERCTRL_FIFO_EN_BIT

#define USERCTRL_FIFO_EN_BIT `6`

---

define USERCTRL_FIFO_RESET_BIT

#define USERCTRL_FIFO_RESET_BIT `2`

---

define USERCTRL_I2C_IF_DIS_BIT

#define USERCTRL_I2C_IF_DIS_BIT `4`

---

define USERCTRL_I2C_MST_EN_BIT

#define USERCTRL_I2C_MST_EN_BIT `5`

---

define USERCTRL_I2C_MST_RESET_BIT

#define USERCTRL_I2C_MST_RESET_BIT `1`

---

define USERCTRL_SIG_COND_RESET_BIT

#define USERCTRL_SIG_COND_RESET_BIT `0`

---

define USER_CTRL

#define USER_CTRL `0x6A`

---

define WHO_AM_I

#define WHO_AM_I `0x75`

---

define XG_OFFSET_H

#define XG_OFFSET_H `0x13`

---

define XG_OFFSET_L

#define XG_OFFSET_L `0x14`

---

define YG_OFFSET_H

#define YG_OFFSET_H `0x15`

---

define YG_OFFSET_L

#define YG_OFFSET_L `0x16`

---

define ZG_OFFSET_H

#define ZG_OFFSET_H `0x17`

---

define ZG_OFFSET_L

#define ZG_OFFSET_L `0x18`

---

define ZRMOTION_DUR

#define ZRMOTION_DUR `0x22`

---

define ZRMOTION_THR

#define ZRMOTION_THR `0x21`

---

---

The documentation for this class was generated from the following file neuralspot/neuralspot/ns-i2c/src/ns_mpu6050_i2c_driver.c