File ns_nvm.c

FileList > apollo5 > ns_nvm.c

NVM (external MSPI flash) helper for erase/read/write/XIP on Apollo5. More...

#include <string.h>
#include "am_mcu_apollo.h"
#include "am_bsp.h"
#include "am_util.h"
#include "ns_core.h"
#include "ns_ambiqsuite_harness.h"
#include "ns_nvm.h"
#include "am_devices_mspi_is25wx064.h"

Public Attributes

Type	Name
const ns_core_api_t	ns_nvm_V0_0_1 = `{ .apiId = NS\_NVM\_API\_ID, .version = NS\_NVM\_V0\_0\_1 }`
const ns_core_api_t	ns_nvm_current_version = `{ .apiId = NS\_NVM\_API\_ID, .version = NS\_NVM\_CURRENT\_VERSION }`
const ns_core_api_t	ns_nvm_oldest_supported_version = `{ .apiId = NS\_NVM\_API\_ID, .version = NS\_NVM\_OLDEST\_SUPPORTED\_VERSION }`

Public Static Attributes

Type	Name
ns_nvm_config_t *	s_cfg = `NULL`
AM_SHARED_RW uint32_t	s_dmatcb
void *	s_flash_handle = `NULL`
void *	s_mspi_handle = `NULL`
const IRQn_Type	s_mspi_irqs = `/* multi line expression */`
uint32_t	s_mspi_module = `0`
am_devices_mspi_is25wx064_timing_config_t	s_timing

Public Functions

Type	Name
void	am_mspi0_isr (void)
void	am_mspi1_isr (void)
void	am_mspi2_isr (void)
void	am_mspi3_isr (void)
uint32_t	ns_nvm_disable_xip (void) Disable XIP on the MSPI instance configured during init.
uint32_t	ns_nvm_enable_xip (void) Enable XIP on the MSPI instance configured during init.
uint32_t	ns_nvm_init (ns_nvm_config_t * cfg) Initialize NVM per the configuration struct (timing scan + init).
uint32_t	ns_nvm_mass_erase (void) Full chip erase. Use with care.
uint32_t	ns_nvm_read (uint32_t addr, uint8_t * buf, uint32_t len, bool wait) Read from NVM into a buffer.
uint32_t	ns_nvm_sector_erase (uint32_t sector_addr) Erase a single sector containing the given address. Sector size for IS25WX064 is 128KB.
uint32_t	ns_nvm_write (uint32_t addr, const uint8_t * buf, uint32_t len, bool wait) Write to NVM from a buffer. Caller must ensure erase has been done.

Public Static Functions

Type	Name
uint32_t	aperture_base_for_module (uint32_t module)
void	build_hal_config (const ns_nvm_config_t * cfg, am_devices_mspi_is25wx064_config_t * out)
am_hal_mspi_device_e	map_iface_to_hal (ns_nvm_interface_e iface, uint8_t ce)
void	prv_mspi_isr_common (void)
void	prv_setup_mpu_for_dmatcb (void)

Macros

Type	Name
define	AM_HAL_MSPI_FLASH_CE0_1_8_8 `AM\_HAL\_MSPI\_FLASH\_OCTAL\_CE0\_1\_8\_8`

Detailed Description

Author:

Ambiq

Version:

0.1

Date:

2025-08-29

Implements a small, stable API over AmbiqSuite's IS25WX064 MSPI flash driver: * Timing scan + init * Erase (sector, mass), Read, Write * XIP enable/disable

References: * boards/apollo510_evb/examples/interfaces/mspi_octal_example (usage) * devices/am_devices_mspi_is25wx064.[ch] (HAL)

Public Attributes Documentation

variable ns_nvm_V0_0_1

const ns_core_api_t ns_nvm_V0_0_1;

variable ns_nvm_current_version

const ns_core_api_t ns_nvm_current_version;

variable ns_nvm_oldest_supported_version

const ns_core_api_t ns_nvm_oldest_supported_version;

Public Static Attributes Documentation

variable s_cfg

ns_nvm_config_t* s_cfg;

variable s_dmatcb

AM_SHARED_RW uint32_t s_dmatcb[256];

variable s_flash_handle

void* s_flash_handle;

variable s_mspi_handle

void* s_mspi_handle;

variable s_mspi_irqs

const IRQn_Type s_mspi_irqs[];

variable s_mspi_module

uint32_t s_mspi_module;

variable s_timing

am_devices_mspi_is25wx064_timing_config_t s_timing;

Public Functions Documentation

function am_mspi0_isr

void am_mspi0_isr (
    void
)

function am_mspi1_isr

void am_mspi1_isr (
    void
)

function am_mspi2_isr

void am_mspi2_isr (
    void
)

function am_mspi3_isr

void am_mspi3_isr (
    void
)

function ns_nvm_disable_xip

Disable XIP on the MSPI instance configured during init.

uint32_t ns_nvm_disable_xip (
    void
)

Returns:

HAL device status code.

function ns_nvm_enable_xip

Enable XIP on the MSPI instance configured during init.

uint32_t ns_nvm_enable_xip (
    void
)

Returns:

HAL device status code.

function ns_nvm_init

Initialize NVM per the configuration struct (timing scan + init).

uint32_t ns_nvm_init (
    ns_nvm_config_t * cfg
)

Parameters:

cfg Config struct (must remain valid during operation).

Returns:

0 on success, ns_core error codes on validation errors, or HAL device status (AM_DEVICES_MSPI_IS25WX064_STATUS_*) on HAL error.

function ns_nvm_mass_erase

Full chip erase. Use with care.

uint32_t ns_nvm_mass_erase (
    void
)

Returns:

HAL device status code.

function ns_nvm_read

Read from NVM into a buffer.

uint32_t ns_nvm_read (
    uint32_t addr,
    uint8_t * buf,
    uint32_t len,
    bool wait
)

Parameters:

addr Byte address in NVM.
buf Destination buffer in SRAM.
len Number of bytes to read.
wait If true, block until completion.

Returns:

HAL device status code.

function ns_nvm_sector_erase

Erase a single sector containing the given address. Sector size for IS25WX064 is 128KB.

uint32_t ns_nvm_sector_erase (
    uint32_t sector_addr
)

Parameters:

sector_addr Sector-aligned (or any address within sector).

Returns:

HAL device status code.

function ns_nvm_write

Write to NVM from a buffer. Caller must ensure erase has been done.

uint32_t ns_nvm_write (
    uint32_t addr,
    const uint8_t * buf,
    uint32_t len,
    bool wait
)

Parameters:

addr Byte address in NVM (page boundaries handled by HAL).
buf Source buffer in SRAM.
len Number of bytes to write.
wait If true, block until completion.

Returns:

HAL device status code.

Public Static Functions Documentation

function aperture_base_for_module

static inline uint32_t aperture_base_for_module (
    uint32_t module
)

function build_hal_config

static void build_hal_config (
    const ns_nvm_config_t * cfg,
    am_devices_mspi_is25wx064_config_t * out
)

function map_iface_to_hal

static inline am_hal_mspi_device_e map_iface_to_hal (
    ns_nvm_interface_e iface,
    uint8_t ce
)

function prv_mspi_isr_common

static inline void prv_mspi_isr_common (
    void
)

function prv_setup_mpu_for_dmatcb

static inline void prv_setup_mpu_for_dmatcb (
    void
)

Macro Definition Documentation

define AM_HAL_MSPI_FLASH_CE0_1_8_8

#define AM_HAL_MSPI_FLASH_CE0_1_8_8 `AM_HAL_MSPI_FLASH_OCTAL_CE0_1_8_8`

The documentation for this class was generated from the following file neuralspot/neuralspot/ns-peripherals/src/apollo5/ns_nvm.c